Chinese institute builds sub-3nm GAA transistors using DUV lithography

September 20, 2026 at 12:28 AM1 min

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China's Institute of Microelectronics has completed preliminary integration of gate-all-around CMOS transistors with stacked nanosheet channels using deep ultraviolet lithography. The work marks a step toward sub-3nm chip production without ASML's EUV equipment, which remains blocked by US export controls.

Key Facts

The Institute of Microelectronics of the Chinese Academy of Sciences completed preliminary integration of GAA CMOS transistors with stacked nanosheet channels using DUV lithography.
The achievement was characterized as a new technological route for early-stage development of MOS transistors for advanced sub-3nm chip production in China.
ASML is prohibited from supplying its latest EUV systems to Chinese customers under current export control rules.

DUV Lithography Breakthrough

Ye Tianchun, an expert at the Institute of Microelectronics of the Chinese Academy of Sciences, announced the preliminary integration of GAA CMOS transistors with stacked nanosheet channels using DUV lithography equipment. The institute identified a preliminary development path for GAA semiconductor devices using less advanced deep ultraviolet lithography, according to Taiwanese media reports citing Ye Tianchun. The result was described as a new technological route for early-stage development of MOS transistors for advanced sub-3nm chip production in China.

Export Control Context

The Netherlands' ASML is barred from supplying its newest EUV systems to Chinese clients under current export control rules. EUV equipment is required for producing chips with process nodes thinner than 7 nanometers. The breakthrough is a step toward Beijing's goal of an alternative method for advanced chip production amid Washington's export restrictions.